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BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
Rev. 01 -- 22 January 2001 Product specification
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOSTM technology, featuring very low on-state resistance. Product availability: BUK9560-100A in SOT78 (TO-220AB) BUK9660-100A in SOT404 (D 2-PAK).
2. Features
s s s s TrenchMOSTM technology Q101 compliant 175 C rated Logic level compatible.
3. Applications
c c
s Automotive and general purpose power switching: x 12 V, 24 V and 42 V loads x Motors, lamps and solenoids.
4. Pinning information
Table 1: Pin 1 2 3 mb Pinning - SOT78 and SOT404, simplified outline and symbol Description gate (g)
mb
Simplified outline
Symbol
drain (d) source (s) mounting base; connected to drain (d)
mb d
g s
2
MBK106
MBB076
1
3
MBK116
123
SOT78 (TO-220AB)
SOT404 (D2-PAK)
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 C; VGS = 5 V Tmb = 25 C VGS = 5 V; ID = 15 A; Tj = 25 C VGS = 4.5 V; ID = 15 A; Tj = 25 C Typ - - - - 51 - Max 100 26 106 175 60 67 Unit V A W C drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter
m m
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS VGSM ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) non-repetitive gate-source voltage drain current (DC) tp 50 s Tmb = 25 C; VGS = 5 V; Figure 2 and 3 Tmb = 100 C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) pulsed reverse drain current non-repetitive avalanche energy Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 20 A; VDS 100 V; VGS = 5 V; RGS = 50 ; starting Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 RGS = 20 k Conditions Min - - - - - - - - -55 -55 - - - Max 100 100 10 15 26 19 106 106 +175 +175 26 106 30 Unit V V V V A A A W C C A A mJ
Source-drain diode
Avalanche ruggedness
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
2 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
03aa24
120
Pder (%)
03na19
120
Ider (%)
100
100
80
80
60
60
40
40
20
20
0
0 0 25 50 75 100 125 150 175 200 Tmb (oC)
0
25
50
75
100
125
150
175
200
Tmb (oC)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 4.5 V ID I der = ------------------ x 100% I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
103
ID (A) RDSon = VDS/ ID
Fig 2. Normalized continuous drain current as a function of mounting base temperature.
03nc76
102
tp = 10 us 100 us 10 D.C. 1 ms 10 ms 100 ms 1 10
tp T t
P
=
tp T
1
102
VDS (V)
103
Tmb = 25 C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
3 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
7. Thermal characteristics
Table 4: Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions vertical in still air; SOT78 package mounted on printed circuit board; minimum footprint; SOT404 package Rth(j-mb) thermal resistance from junction to mounting base Figure 4 Value 60 50 Unit K/W K/W
1.4
K/W
7.1 Transient thermal impedance
10 Zth(j-mb) (K/W)
03nc77
1
= 0.5
0.2
0.1
10-1
P
0.05
=
tp T
0.02
Single Shot
tp T
t
10-2 10-6 10-5 10-4 10-3 10-2 10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
4 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
8. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 175 C Tj = -55 C IDSS drain-source leakage current VDS = 100 V; VGS = 0 V Tj = 25 C Tj = 175 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 5 V; ID = 15 A; Figure 7 and 8 Tj = 25 C Tj = 175 C VGS = 4.5 V; ID = 15 A VGS = 10 V; ID = 15 A Dynamic characteristics Ciss Coss Crss td(on) tr td(off) tf Ld input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance from drain lead 6 mm from package to centre of die from contact screw on mounting base to centre of die SOT78 from upper edge of drain mounting base to centre of die SOT404 Ls internal source inductance from source lead to source bond pad VDD = 30 V; RL = 1.2 ; VGS = 5 V; RG = 10 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 - - - - - - - - - 1440 155 100 20 124 68 67 4.5 3.5 1924 186 138 - - - - - - pF pF pF ns ns ns ns nH nH - - - - 51 - - 49 60 150 67 58 m m m m - - - 0.05 - 2 10 500 100 A A nA 1 0.5 - 1.5 - - 2 - 2.3 V V V 100 89 - - - - V V Min Typ Max Unit Static characteristics
-
2.5
-
nH
-
7.5
-
nH
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
5 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
Table 5: Characteristics...continued Tj = 25 C unless otherwise specified Symbol VSD trr Qr Parameter source-drain (diode forward) voltage reverse recovery time recovered charge Conditions IS = 25 A; VGS = 0 V; Figure 15 IS = 20 A; dIS/dt = -100 A/s VGS = -10 V; VDS = 30 V Min - - - Typ 0.85 61 200 Max 1.2 - - Unit V ns nC Source-drain diode
80 ID (A) 60
03nc73
VGS (V) = 6
8
10 5 4
100 RDSon (m) 90
03nc72
80 40
70 3
60
20 50 0 0 2 4 6 8 2.2 40 10 VDS (V) 2 4 6 8V 10 GS (V)
Tj = 25 C; tp = 300 s
Tj = 25 C; ID = 15 A
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values.
03aa29
140 RDSon (m) 120 100 80 60 40 20 0 0
03nc74
VGS (V) = 3
3.2
3.4 3.6 3.8 4 5
3 a 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -60 -20 20 60 100 140 180 Tj (oC)
20
40
60 I (A) 80 D
Tj = 25 C
R DSon a = --------------------------R DSon ( 25 C )
Fig 7. Drain-source on-state resistance as a function of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
6 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
2.5 VGS(th)
(V) max
03aa33
10-1
ID (A) 10-2
03aa36
2
typ
1.5
min
10-3
min
typ
max
1
10-4
0.5
10-5
0 -60 -20 20 60 100 140 180 Tj (oC)
10-6
0 0.5 1 1.5 2 2.5
VGS (V)
3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of junction temperature.
40 gfs (S) 30
03nc70
Fig 10. Sub-threshold drain current as a function of gate-source voltage.
3500 C (pF) 3000 2500 2000
03nc75
20
1500 1000 Ciss
10
500
0 0 20 40 ID (A) 60
0 0.01 0.1 1 10 VDS (V)
Coss Crss 100
Tj = 25 C; VDS = 25 V
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
7 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
50 ID (A) 40
03nc71
5 VGS (V) 4
03nc69
VDD = 14 V
30
3 VDD = 80 V
20
2
10 Tj = 175 oC 0 0 1 2 3V 4 GS (V) Tj = 25 oC
1
0 0 10 20 30 Q (nC) 40 G
VDS = 25 V
Tj = 25 C; ID = 15 A
Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
70 IS (A) 60 50 40 30 20 10 0 0.0 0.5
Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values.
03nc68
Tj = 175 oC Tj = 25 oC
1.0
VSD (V)
1.5
VGS = 0 V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
8 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
9. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78
E P
A A1 q
D1
mounting base
D
L2(1)
L1 Q
L
b1
1
2
3
b c
e
e
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.5 4.1 A1 1.39 1.27 b 0.9 0.7 b1 1.3 1.0 c 0.7 0.4 D 15.8 15.2 D1 6.4 5.9 E 10.3 9.7 e 2.54 L 15.0 13.5 L1 3.30 2.79 L2 max. 3.0
(1)
P 3.8 3.6
q 3.0 2.7
Q 2.6 2.2
Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC 3-lead TO-220AB EIAJ SC-46 EUROPEAN PROJECTION ISSUE DATE 99-09-13 00-09-07
Fig 16. SOT78 (TO-220AB).
9397 750 07771 (c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
9 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped)
SOT404
A E A1 mounting base
D1
D
HD
2
Lp
1
3
b c Q
e
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 2.54 Lp 2.90 2.10 HD 15.40 14.80 Q 2.60 2.20
OUTLINE VERSION SOT404
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 98-12-14 99-06-25
Fig 17. SOT404 (D2-PAK).
9397 750 07771 (c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
10 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
10. Soldering
handbook, full pagewidth
10.85 10.60 10.50 1.50 7.50 7.40 1.70
2.25 2.15
8.15
8.35
8.275 1.50
4.60
0.30 4.85
5.40 8.075
7.95
3.00
0.20
solder lands solder resist occupied area solder paste 5.08
1.20 1.30 1.55
MSD057
Dimensions in mm.
Fig 18. Reflow soldering footprint for SOT404.
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
11 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
11. Revision history
Table 6: 01 Revision history CPCN Description Product Specification; initial version
Rev Date 20010122
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
12 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
12. Data sheet status
Datasheet status Objective specification Preliminary specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Product specification
Production
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
13. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
14. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
9397 750 07771
(c) Philips Electronics N.V. 2001 All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
13 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
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Internet: http://www.semiconductors.philips.com
(SCA71)
9397 750 07771
(c) Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 -- 22 January 2001
14 of 15
Philips Semiconductors
BUK9560-100A; BUK9660-100A
TrenchMOSTM logic level FET
Contents
1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
(c) Philips Electronics N.V. 2001.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 22 January 2001 Document order number: 9397 750 07771

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